A working system sometimes operates at the precipice of a failure threshold. Such systems are more susceptible to failure caused by subsequently exceeding that threshold. MarginTesting is a testing technique that seeks to identify such situations by intentionally varying various parameters and observing the result.

A simple example is the communication between a hardware driver and receiver. In some logic families, this is accomplished by interpreting a voltage of greater than a certain amount as "asserted" and less than smaller amount as "negated". A voltage margin tester exercises a particular component by artificially moving the interface voltages higher or lower. The amount of change tolerated before failure measures the susceptibility of the device to voltage noise.

A more complex example is a dynamic communication bus or backplane, where hardware protocols demand that certain events have specific timing relationships to other events. Signal A, for example, is required to be asserted no less than 120 nanoseconds after signal B is asserted, and no more than 700 nanoseconds. A timing margin tester drives such a bus or backplane and artificially varies timing relationships. The response of the systems being tested measure their susceptibility to timing noise.

Software MarginTesting accomplishes this same thing, by varying aspects of a system under test and measuring that system's response. For example, artificial delays might be introduced between request and reply messages in order to simulate system load.

Such software MarginTesting is, in 2004, still relatively unusual.